noonghunna 9f77be791b docs(hardware): regen 3090 power-cap charts with SM clock + plateau evidence ...

Re-ran both 21-cap sweeps with the new sampling fields (commit ab2796d).
The boost-state plateau hypothesized in the prior captions is now directly
evidenced by the SM-clock data:

decode-single (~8m sweep):
  Caps 340/350/360/370W → SM 1560 MHz, draw 334W, TPS 34.66 — identical.
  Cap 380W → SM 1635 MHz, draw 361W, TPS 35.56 (plateau escape).

prefill-heavy (~6m sweep):
  Caps 330-370W → SM 1605-1620 MHz, draw 327W, TPS 1050 — identical.
  Cap 380W → SM 1665 MHz, draw 355W, TPS 1080 (plateau escape).

Throttle stays at 100% across the plateau in both modes — firmware *is*
power-capping, but the cap it enforces is its own internal voltage/clock
setpoint, not the user-set software cap. This makes the prior "we think
this is a firmware plateau" framing concrete: it's a boost-clock lock,
released only at the next cap step.

Chart annotations updated to reference SM-clock evidence directly.
HARDWARE.md cross-rig table rows for @noonghunna's rig refreshed with
new TPS numbers + SM clock annotation. Sweet spots unchanged (290W
decode / 250W prefill); the new data refines the explanation rather
than the conclusion.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

2026-05-07 22:55:14 +00:00

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